The first step is specification of the requirements. Such specifications will include the performance requirements derived from the number of images to be process/sec and the operations to be performed on them, as well as interface requirements, cost constraints, and other physical requirements such as size and power dissipation. From this functional requirements, a preliminary high-level function design can be generated.
This initial functional design is now refined to produce a more detailed design description at the level of register, memories, arithmetic units, and state machines. This is the register transfer level (RTL) of the design. Subsequent refinement of this RTL description produces a logic design that implements each of the RTL components. Both the RTL and logic level simulation may used to ensure that the design meets the original specification. Fault simulation can model the effects of expected manufacturing defects as well as fault that may induced due to the environment.
Finally, the logic level implementation is transformed into a circuit level implementation and thence to a physical chip layout from which accurate physical properties of the design, such as chip area and power dissipation.