Saturday, August 14, 2010

Instructions Set


The addressing of modes of Instruction Set offered by 8051 Architecture:
  • Direct Register Addressing - ACC (Accumulator) & R0-R7
  • Direct Memory Addressing - Internal RAM or Special Function Registers
  • Indirect Memory Addressing – Using register R0 & R1 or DPTR to hold the memory address.
  • Individual Bits of a Bit addressable register.
Instruction Set for 8051

ACALL - Absolute Call
Description: The ACALL instruction unconditionally calls a subroutine located at the specified address. The call may only be made to route to locate within the same page of memory block The PC is incremented twice to obtain the address of the following instruction. The 16-bit PC is then stored on the stack (low-order byte first) and the stack pointer is incremented twice. Only 11 bits of the Program Counter are affected by ACALL. No flags are affected.
Syntax: ACALL Address
Example:
ACALL LABEL


ADD – Add
Description: The ADD instruction adds the associate register or value with accumulator and stores the result in accumulator. The auxiliary carry flag is set if there is carry out of bit 3 and the carry flag is set if there is carry out of bit 7. Over flow flag set when the result overflowed the or addition two negative numbers.
Syntax:
1. ADD A,Register
{A} << {A} + Register
2. ADD A,Value
{A} << {A} + Register
Example:
ADD A,R0
{A} << {A} + R0
ADD A,#0x0A
{A} << {A} + 0x0A


ADDC – Add Accumulator With Carry
Description: The ADDC instruction adds the associate register or value with accumulator with carry flag and stores the result in accumulator. The auxiliary carry flag is set if there is carry out of bit 3 and the carry flag is set if there is carry out of bit 7. Over flow flag set when the result overflowed the or addition two negative numbers.
Syntax:
1. ADDC A,Register
{A} << {A} + Register
2. ADDC A,Value
{A} << {A} + Register
Example:
ADDC A,R0
{A} << {A} + R0
ADD A,#0x0A
{A} << {A} + 0x0A


AJMP - Absolute Jump
Description: The AJMP instruction unconditionally jumps to the specified address. The jump is only be made to rout to locate within the same page of memory block No flags are affected.
Syntax: AJMP Address
Example:
AJUMP LABEL


ANL - Bitwise AND
Description: The ANL instruction does a bitwise logical 'AND' operation on the two operands. The result will be stored in the destination operand. The contents of the source operand will be remain unchanged. The operand combinations could be: accumulator as destination then the source will be register, direct data, register-indirect or immediate address; if destination is direct address the source can accumulator or direct data. Each bit of two operands logically 'AND' and the result will be stored in the respective bit of the first operand.
Syntax:  
ANL Source, Destination
Example:
ANL A, Rn
{A} << {A} ^ R0

ANL A, #0x10
{A} << {A} ^ 0x10

ANL A, &(RAM)
{A} << {A} ^ &(RAM)

ANL &(RAM), A
{&(RAM)} << {&(RAM)} ^ A

ANL &(RAM), #0x10
{&(RAM)} << {&(RAM)} ^ #0x10

ANL C, bit addr

Contd...

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