| GP0/ ICSPDAT/ CIN+ | GP0 | Bidirectional I/O pin. Can be programmed for pull-up and wake-up from Sleep on pin change. |
| ICSPDAT | In-Circuit Serial Programming™ data pin. | |
| CIN+ | Comparator input (PIC10F204/206 only). | |
| GP1/ ICSPCLK/ CIN- | GP1 | Bidirectional I/O pin. Can be programmed for internal weak pull-up and wake-up from Sleep on pin change. |
| ICSPCLK | In-Circuit Serial Programming clock pin. | |
| CIN- | Comparator input (PIC10F204/206 only). | |
| GP2/ T0CKI/ COUT/ FOSC4 | GP2 | Bidirectional I/O pin. |
| T0CKI | Clock input to TMR0. | |
| COUT | Comparator output (PIC10F204/206 only). | |
| FOSC4 | Oscillator/4 output. | |
| GP3/ MCLR/ VPP | GP3 | Input pin. Can be programmed for internal weak pull-up and wake-up from Sleep on pin change. |
| MCLR | Master Clear (Reset). When configured as MCLR, this pin is an active-low Reset to the device. Voltage on GP3/MCLR/VPP must not exceed VDD during normal device operation or the device will enter Programming mode. Weak pull-up always on if configured as MCLR. | |
| VPP | Programming voltage input. | |
| VDD |
| Positive supply for logic and I/O pins. |
| VSS |
| Ground reference for logic and I/O pins. |
| GP0/ AN0/ ICSPDAT | GP0 | Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. |
| AN0 | Analog Input | |
| ICSPDAT | In-Circuit Serial Programming™ data pin. | |
| GP1/ AN1/ ICSPCLK | GP1 | Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. |
| ICSPCLK | In-Circuit Serial Programming clock pin. | |
| CIN- | Comparator input (PIC10F204/206 only). | |
| GP2/ T0CKI/ FOSC4 | GP2 | Bidirectional I/O pin. |
| T0CKI | Clock input to TMR0. | |
| FOSC4 | Oscillator/4 output. | |
| GP3/ MCLR/ VPP | GP3 | Input pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. |
| MCLR | Master Clear (Reset). When configured as MCLR, this pin is an active-low Reset to the device. Voltage on GP3/MCLR/VPP must not exceed VDD during normal device operation or the device will enter Programming mode. Weak pull-up always on if configured as MCLR. | |
| VPP | Programming voltage input. | |
| VDD |
| Positive supply for logic and I/O pins. |
| VSS |
| Ground reference for logic and I/O pins. |
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