The Features of 8051 Architecture

• An 8-bit ALU
• CISC based Harvard Memory Architecture
  
  •  The external program memory and data memory have separate address spaces and control signal(s).
  • 8-bit internal data bus width and 16-bit internal address bus.
    
• Operating frequency upto 12MHz
• Instruction Cycle Time of 1μs
• 32 Digital I/O Pins
  
  • Four ports of 8-bits each in single chip mode.
    
• Internal data (RAM) memory – 128 bytes.
  
  •  Special function registers (SFRs)
  •  PSW (processor status word), A (accumulator), B register, SP (stack pointer) and registers for serial IOs, timers, ports and interrupt handler
    
• Two external interrupt pins, INT0 and INT1
• Two Timer/Counter –16-bit(Timer 0 and Timer 1)
• Serial Interface (SI) – Programmable full duplex UART modes for serial IO
• Low-power idle and power-down modes
• 4V to 6V operating range.